Defect-engineered room temperature destructive differential resistance in monolayer MoS2 transistors


The destructive differential resistance (NDR) impact has been extensively investigated for the event of assorted digital units. Other than conventional semiconductor-based units, two-dimensional (2D) transition metallic dichalcogenide (TMD)-based field-effect transistors (FETs) have additionally lately exhibited NDR conduct in a number of of their heterostructures. Nonetheless, to watch NDR within the type of monolayer MoS2, theoretical prediction has revealed that the fabric must be extra profoundly affected by sulfur (S) emptiness defects. On this work, monolayer MoS2 FETs with a certain quantity of S-vacancy defects are fabricated utilizing three approaches, specifically chemical remedy (KOH answer), bodily remedy (electron beam bombardment), and as-grown MoS2. Based mostly on systematic research on the correlation of the S-vacancies with each the system’s electron transport traits and spectroscopic evaluation, the NDR has been clearly noticed within the defect-engineered monolayer MoS2 FETs with an S-vacancy (VS) quantity of ∼5 ± 0.5%. Consequently, secure NDR conduct may be noticed at room temperature, and its peak-to-valley ratio may also be successfully modulated by way of the gate electrical area and lightweight depth. By means of these outcomes, it’s envisioned that extra digital functions based mostly on defect-engineered layered TMDs will emerge within the close to future.

Graphical abstract: Defect-engineered room temperature negative differential resistance in monolayer MoS2 transistors